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Course Modules

VLSI Physical Design Ocean Modules

Complete syllabus structured module-wise

Module 1

Introduction to Electronics

Module 2

MOSFET & CMOS Theory

Module 3

Digital Electronics

Module 4

Linux & Basic Tcl Script

Module 5

RTL Coding using Verilog

Module 6

Logical Sytnesis

Module 7

Design For Testability

Module 8

Physical Synthesis

Module 9

Static Timing Analysis - 1

Module 10

Static Timing Analysis - 2

Module 11

Static Timing Analysis - 3

Module 12

PNR Inputs & Sanity Checks

Module 13

FloorPlan & PowerPlan

Module 14

Placement

Module 15

Clock Tree Synthesis - 1

Module 16

Clock Tree Synthesis - 2

Module 17

Routing

Module 18

Physical Verification & Signoff

Module 19

Core Interview Questions (Electronics, CMOS, Digital, Linux)

Module 20

Interview Questions (RTL, Synthesis, DFT & STA)

Module 21

Physical Design (PNR) Interview Questions

Module 22

Physical Verification & Signoff Interview Questions

Module 23

Cirtification

Module 24

Resume Templates for Freshers & Experienced Engineers

Module 25

Complete PNR Exicution In ICC2,Innovus,FC

Module 26

All Synopsis and Cadence user guides and study materials